In recent years, there have been demands for thin, lightweight, fast response display devices, and accordingly, research and development for organic EL (Electro Luminescence) displays and FEDs (Field Emission Displays) have been actively conducted.
An organic EL element included in an organic EL display emits light with higher luminance as the voltage to be applied thereto is higher and the amount of current flowing therethrough is larger. However, the relationship between luminance and voltage of the organic EL element easily varies due to an influence such as drive time or ambient temperature. Hence, when a voltage control type drive scheme is adopted in an organic EL display, it is very difficult to suppress variations in the luminance of the organic EL element. In contrast to this, the luminance of the organic EL element is substantially proportional to current and this proportional relationship is less susceptible to external factors such as ambient temperature. Therefore, it is desirable to adopt an electric current control type drive scheme in the organic EL display.
Meanwhile, a pixel circuit and a drive circuit of a display device are composed using TFTs (Thin Film Transistors) made of amorphous silicon, low-temperature polycrystal silicon, CG (Continuous Grain) silicon, or the like. However, variations easily occur in TFT characteristics (e.g., threshold voltage and mobility). In view of this, a circuit that compensates for variations in TFT characteristics is provided in a pixel circuit of an organic EL display and by the action of this circuit, variations in the luminance of the organic EL element are suppressed.
Schemes to compensate for variations in TFT characteristics in an electric current driving type drive scheme are broadly divided into an electric current program scheme in which the amount of current flowing through a driving TFT is controlled by a current signal; and a voltage program scheme in which such an amount of current is controlled by a voltage signal. Use of the electric current program scheme enables to compensate for variations in threshold voltage and mobility and use of the voltage program scheme enables to compensate for only variations in threshold voltage.
However, the electric current program scheme has the following problems: first, since a very small amount of current is handled, it is difficult to design a pixel circuit and a drive circuit; and second, since it is susceptible to parasitic capacitance while a current signal is set, it is difficult to achieve a large-area circuit. On the other hand, in the voltage program scheme, an influence of parasitic capacitance, etc., is little and a circuit design is also relatively simple. In addition, the influence exerted on the amount of current by variations in mobility is smaller than the influence exerted on the amount of current by variations in threshold voltage and the variations in mobility can be suppressed to a certain extent in a TFT fabrication process. Accordingly, even a display device adopting the voltage program scheme can obtain satisfactory display quality.
For an organic EL display adopting the electric current driving type drive scheme, a pixel circuit shown below has been conventionally known. FIG. 17 is a circuit diagram of a pixel circuit described in Patent Document 1. A pixel circuit 910 shown in FIG. 17 includes a driving TFT 911, switching TFTs 912 to 914, capacitors 915 and 916, and an organic EL element 917, All of the TFTs included in the pixel circuit 910 are of a p-channel type.
In the pixel circuit 910, the driving TFT 911, the switching TFT 914, and the organic EL element 917 are provided in series between a power supply wiring line Vp (potential is VDD) and a ground. The capacitor 915 and the switching TFT 912 are provided in series between a gate terminal of the driving TFT 911 and a data line Sj. The switching TFT 913 is provided between the gate and drain terminals of the driving TFT 911 and the capacitor 916 is provided between the gate terminal of the driving TFT 911 and the power supply wiring line Vp. A gate terminal of the switching TFT 912 is connected to a scanning line Gi, a gate terminal of the switching TFT 913 is connected to an auto-zero line AZi, and a gate terminal of the switching TFT 914 is connected to an illumination line ILi.
FIG. 18 is a timing chart of the pixel circuit 910. Before time t0, the potentials of the scanning line Gi and the auto-zero line AZi are controlled to a high level, the potential of the illumination line ILi is controlled to a low level, and the potential of the data line Sj is controlled to a reference potential Vstd. When at time t0 the potential of the scanning line Gi is changed to a low level, the switching TFT 912 is changed to a conduction state. Then, when at time t1 the potential of the auto-zero line AZi is changed to a low level, the switching TFT 913 is changed to a conduction state. Thus, the gate and drain terminals of the driving TFT 911 are equal in potential.
Then, when at time t2 the potential of the illumination line ILi is changed to a high level, the switching TFT 914 is changed to a non-conduction state. At this time, a current flows into the gate terminal of the driving TFT 911 from the power supply wiring line Vp through the driving TFT 911 and the switching TFT 913, and the gate terminal potential of the driving TFT 911 rises while the driving TFT 911 is in a conduction state. The driving TFT 911 is changed to a non-conduction state when the gate-source voltage becomes a threshold voltage Vth (negative value) (i.e., the gate terminal potential becomes (VDD+Vth)). Therefore, the gate terminal potential of the driving TFT 911 rises to (VDD+Vth).
Then, when at time t3 the potential of the auto-zero line AZi is changed to a high level, the switching TFT 913 is changed to a non conduction state. At this time, a potential difference (VDD+Vth−Vstd) between the gate terminal of the driving TFT 911 and the data line Sj is held in the capacitor 915.
Then, when at time t4 the potential of the data line Sj is changed from the reference potential Vstd to a data potential Vdata, the gate terminal potential of the driving TFT 911 is changed by the same amount (Vdata−Vstd) and thus becomes (VDD+Vth+Vdata−Vstd). Then, when at time t5 the potential of the scanning line Gi is changed to a high level, the switching TFT 912 is changed to a non-conduction state. At this time, a gate-source voltage (Vth+Vdata−Vstd) of the driving TFT 911 is held in the capacitor 916.
Then, when at time t6 the potential of the illumination line ILi is changed to a low level, the switching TFT 914 is changed to a conduction state. Thus, a current flows through the organic EL element 917 from the power supply wiring line Vp through the driving TFT 911 and the switching TFT 914. Although the amount of current flowing through the driving TFT 911 increases or decreases depending on the gate terminal potential (VDD+Vth+Vdata−Vstd), even when the threshold voltage Vth is different, if the potential difference (Vdata−Vstd) is the same, then the amount of current is the same. Therefore, regardless of the value of the threshold voltage Vth, a current of an amount according to the potential Vdata flows through the organic EL element 917 and thus the organic EL element 917 emits light with a luminance according to the data potential Vdata.
As such, according to the pixel circuit 910, variations in the threshold voltage of the driving TFT 911 can be compensated for and the organic EL element 917 is allowed to emit light with a desired luminance.
FIG. 19 is a circuit diagram of a pixel circuit described in Patent Document 2. A pixel circuit 920 shown in FIG. 19 includes a driving TFT 921, switching TFTs 922 to 925, a capacitor 926, and an organic EL element 927. The switching TFTs 923 and 925 are of an n-channel type and other TFTs are of a p-channel type.
In the pixel circuit 920, the driving TFT 921, the switching TFT 925, and the organic EL element 927 are provided in series between a power supply wiring line Vp and a common cathode Vcom (potentials are respectively VDD and VSS). The capacitor 926 and the switching TFT 922 are provided in series between a gate terminal of the driving TFT 921 and a data line Sj. Hereinafter, a connection point between the driving TFT 921 and the capacitor 926 is referred to as A and a connection point between the capacitor 926 and the switching TFT 922 is referred to as B. The switching TFT 923 is provided between the connection point B and the power supply wiring line Vp and the switching TFT 924 is provided between the connection point A and a drain terminal of the driving TFT 921. All gate terminals of the respective switching TFTs 922 to 925 are connected to a scanning line Gi.
FIG. 20 is a timing chart of the pixel circuit 920. Before time t0, the potential of the scanning line Gi is controlled to a high level. When at time t0 the potential of the scanning line Gi is changed to a low level, the switching TFTs 922 and 924 are changed to a conduction state and the switching TFTs 923 and 925 are changed to a non-conduction state. Thus, the connection point B is disconnected from the power supply wiring line Vp and connected to the data line Sj through the switching TFT 922. Also, the gate and drain terminals of the driving TFT 921 obtain the same potential. Hence, a current flows into the gate terminal of the driving TFT 921 from the power supply wiring line Vp through the driving TFT 921 and the switching TFT 924, and the potential at the connection point A rises while the driving TFT 921 is in a conduction state. The driving TFT 921 is changed to a non-conduction state when the gate-source voltage becomes a threshold voltage Vth (negative value) (i.e., the potential at the connection point A becomes (VDD+Vth)). Therefore, the potential at the connection point A rises to (VDD+Vth).
Then, when at time t1 the potential of the data line Sj is changed from a data potential Vdata0 for the last time (a data potential written to a pixel circuit in an adjacent upper row) to a data potential Vdata for this time, the potential at the connection point B is changed to Vdata. Accordingly, the voltage between electrodes of the capacitor 926 immediately before time t2 is a potential difference (VDD+Vth−Vdata) between the connection point A and the connection point B.
Then, when at time t2 the potential of the scanning line Gi is changed to a high level, the switching TFTs 922 and 924 are changed to a non-conduction state and the switching TFTs 923 and 925 are changed to a conduction state. Thus, the gate terminal of the driving TFT 921 is disconnected from the drain terminal. Also, the connection point B is disconnected from the data line Sj and connected to the power supply wiring line Vp through the switching TFT 923. Thus, the potential at the connection point B is changed from Vdata to VDD and accordingly the potential at the connection point A is changed by the same amount (VDD−Vdata; hereinafter, referred to as VB) and thus becomes (VDD+Vth+VB).
After time t2, the switching TFT 925 goes into a conduction state and thus a current flows through the organic EL element 927 from the power supply wiring line Vp through the driving TFT 921 and the switching TFT 925. Although the amount of current flowing through the driving TFT 921 increases or decreases depending on the gate terminal potential (VDD+Vth+VB), even when the threshold voltage Vth is different, if the potential difference VB is the same, then the amount of current is the same. Therefore, regardless of the value of the threshold voltage Vth, a current of an amount according to the potential Vdata flows through the organic EL element 927 and thus the organic EL element 927 emits light with a luminance according to the data potential Vdata.
As such, according to the pixel circuit 920, as with the pixel circuit 910, variations in the threshold voltage of the driving TFT 921 can be compensated for and the organic EL element 927 is allowed to emit light with a desired luminance. In addition, the pixel circuit 920 has an advantage over the pixel circuit 910 in that the circuit size is smaller due to the absence of the capacitor 916, the auto-zero line AZi, and the illumination line ILi. Note that in the pixel circuit 920 in order to bring the driving TFT 921 of a p-channel type into a conduction state, the potential difference VB needs to be negative (i.e., Vdata>VDD).                [Patent Document 1] International Publication Pamphlet No. WO 98/48403        [Patent Document 2] Japanese Patent Application Laid-Open No. 2005-157308        